The size of power converters in modem electronic equipment has been reduced by designing converters which use high switching frequencies. By operating at high frequencies, the inductive and capacitive energy storage devices in the power converters may be made smaller than would otherwise be possible at lower frequencies. One drawback of operating at higher frequencies is reduced converter efficiency due to greater switching losses. These switching losses are incurred when the transistor switches of the converter are turned on.
Switching losses may be minimized by ensuring that the transistors in the converter are only turned on when the voltage and/or current across the transistors is as close to zero as possible.
One class of converter, known as zero voltage, resonant-transition converters, reduces switching losses by achieving ZVS at a fixed switching frequency. U.S. Pat. No. 4,860,189 to Hitchcock discloses one such converter wherein zero voltage switching is achieved by using energy stored in the leakage inductance and magnetizing inductance of the primary of the main transformer during the primary on-time to charge the parasitic capacitors of the field effect transistor (FET) switches during the free-wheeling stage of operation.
U.S. Pat. No. 5,132,889 to Hitchcock et al. discloses an improvement which enables the ZVS resonant-transition converter to maintain operation over a full load range. The improved converter includes an H-bridge or full bridge switching circuit with FET switches in each leg thereof The primary of a center-tapped transformer is connected across the bridge. A saturable core reactor and an output rectifier are connected in series with each secondary winding of the center-tapped transformer. The saturable core reactors provide a blocking function which forces a freewheeling current induced by the output inductor to substantially flow through only one of the secondary windings for a predetermined time interval (the "blocking interval") of at least a portion of the freewheeling stage of operation. By blocking current in one half of the rectifier circuit during the freewheeling stage the output inductor sustains a current in the secondary winding, thereby inducing a current in the primary winding. The current in the primary winding charges the parasitic capacitance in the FET switches such that each FET is turned on only when the voltage across it is near zero. In the absence of the saturable reactors, the current induced by the output inductor would be split between the two secondary windings and would "cancel" each other out without inducing additional current in the primary winding. Without the additional current in the primary winding there may not be enough energy in the primary side of the transformer to charge/discharge the parasitic capacitances of the FET switches in order to achieve ZVS.
One shortcoming with the resonant-transition ZVS converter stems from the fact that the blocking time interval must remain relatively constant with respect to the switching frequency. The blocking time, as well as the saturable reactors, are selected or designed with reference to a nominal input voltage. In some applications, such as telecommunication applications where battery backup power may be employed, or with arc welding equipment, the input voltage may vary considerably from the nominal value. Saturable core reactors, however, block a constant volt-time. Thus, as the input voltage decreases the blocking time increases which results in a decrease in the effective duty cycle of the converter. This means that the blocking time is excessive for low input voltages (relative to the nominal value) yet there may not be enough blocking time for high input voltages. So, for relatively low input voltages, the output voltage may go out of regulation because there is not enough duty cycle, and at relatively high input voltages, the converter may not achieve ZVS because there is not enough blocking time.